The Optical Boundary Is Moving Inward: Why AI Bandwidth Is Pushing Photonics Toward Compute

September 6, 2026

AI Civilization Map Node: AI Optical Interconnects and the Inward-Moving Optical Boundary
Primary Map Layer: Fiber, Networks & Distributed Intelligence — Coordination Fabric
Primary Map Branch: Fiber & Data Movement
Secondary Map Layer: Semiconductors, Compute & Packaging — Machine Substrate
Supporting Map Layer: Geopolitics, Sovereignty & Constraints — Boundary Conditions
Structural Function: Shortens high-speed electrical reach by moving optical conversion closer to compute, enabling higher bandwidth density while shifting bottlenecks into photonics, packaging, materials, and supply chains.

Overview

For most of the modern AI cycle, the public conversation has treated computation as if it were the scarce object and networking as if it were plumbing. The most visible questions have therefore been about GPUs, custom accelerators, HBM, model size, inference cost, and power. Yet a cluster of accelerators becomes useful only when those processors can exchange model state, gradients, activations, parameters, cache, storage traffic, and control information quickly enough to behave like a coordinated system. A rack filled with powerful silicon is not automatically a larger computer. It becomes one only when the interconnect can keep the processors synchronized without consuming too much time, power, board area, cable volume, or operational complexity.

This is why the next phase of AI infrastructure cannot be understood through compute alone. AI is becoming a data-movement machine. As accelerator density rises, the number of high-speed links rises with it. As lane rates rise, the electrical channels carrying those links become harder to preserve. More equalization, retiming, forward-error correction, and signal conditioning can extend the electrical domain, but each rescue mechanism carries a cost. Eventually the economically useful distance of an electrical signal contracts. At that point the system does not stop scaling. Instead, the point at which electricity becomes light moves closer to the compute.

The central structural argument of this essay is therefore not that copper is about to disappear, nor that one optical architecture will replace every other. It is narrower and more durable: as AI bandwidth density rises, the economically viable electrical reach of the system tends to shrink, increasing the incentive to move the electrical-to-optical boundary closer to the ASIC. Different links may cross that boundary at different times because a chip package, a server board, a rack, a row of racks, and a data-center interconnect solve different engineering problems. Copper can remain valuable where distance is short, cost is sensitive, and serviceability matters. Pluggable optics can remain valuable where modularity and field replacement dominate. Co-packaged optics may become compelling where bandwidth density and power per bit outweigh the advantages of a front-panel module. Optical I/O may eventually push the same logic into the package-level fabric around processors and memory.

Seen this way, a set of technologies that are often discussed as separate markets are really positions along one migration path: copper traces → retimers → active electrical cables → DSP-based pluggable optics → linear pluggable optics → co-packaged optics → optical I/O. The sequence is not a guaranteed calendar, and several stages can coexist for a long time. What unifies them is the effort to reduce the amount of high-speed electrical distance that must be crossed before data reaches a lower-loss optical medium.

That migration also changes the industrial map. The value chain is no longer only about who manufactures an optical transceiver. It includes SerDes and switch silicon, retimers, AECs, DSPs, drivers and TIAs, photonic integrated circuits, lasers, modulators, compound-semiconductor substrates, external light sources, fiber attachment, advanced packaging, and the manufacturing systems that connect all of them. The architecture can remove one component while increasing the importance of another. It can eliminate a front-panel box while making high-power continuous-wave lasers more strategic. It can reduce the role of a module DSP while increasing the burden placed on the host ASIC and optical engine. Integration does not erase the supply chain; it rearranges it.

By 2026 this transition has moved beyond laboratory roadmaps. NVIDIA introduced Spectrum-X Ethernet Photonics around co-packaged silicon photonic engines and said its new architecture can reduce power per 1.6 Tb/s port by five times relative to pluggable interconnects. Then, on March 2, NVIDIA announced separate approximately $2 billion investments in Lumentum and Coherent, together with multibillion-dollar purchase commitments and future capacity rights. A few months later AXT disclosed an approximately $632.5 million capital raise supporting indium-phosphide capacity expansion and 6-inch InP research, while Lumentum signed a long-term agreement reserving AXT InP wafer capacity through 2031. These events do not prove that every AI network will become co-packaged. They do show that photonics, laser capacity, and the materials beneath those lasers are becoming strategic industrial inputs rather than peripheral communication components.

The geopolitical layer is now moving into the same stack. Reuters first disclosed on August 4 that the Federal Communications Commission (FCC) was working on a draft measure that could bar imports of new models of Chinese optical transceivers on national-security grounds; the restriction could still be modified or shelved. On August 5, Reuters reported the sharp market reaction among Chinese optical-hardware suppliers. At the same time, AXT has disclosed that China added indium-phosphide substrates to its export-control list in 2025, requiring export permits for Tongmei-produced substrates. The structural contradiction is important: a country can seek to diversify the downstream module layer while remaining exposed to materials or manufacturing capacity upstream. In optical infrastructure, as in semiconductors and power, the location of the technological bottleneck may not be the same as the location of the geopolitical bottleneck.

This article follows that chain from electrons to photons. It begins with the physical reason electrical reach becomes more expensive, maps the distance domains inside an AI factory, explains why the industry first extends copper before replacing it, then follows the optical boundary from the front panel toward the package. It ends at the upstream materials and geopolitical constraints that increasingly determine whether the photonic transition can be manufactured at scale. The purpose is not to forecast a single winning architecture or company. It is to make visible the structural constraint underneath the transition: effective AI scaling as a coordinated system depends on data movement scaling alongside compute.

Scope & Reader Frame. This is an analytical, educational, non-commercial structural analysis with a roughly 5–15 year horizon. It evaluates observable engineering, industrial, and policy constraints rather than advocating a political, procurement, or investment position. It is not investment advice.

Structural anchor. At higher bandwidth densities, maintaining a fixed electrical reach generally requires more signal conditioning, power, channel engineering, or packaging margin. Shortening that electrical reach by moving optical conversion inward is a competing design response. The article tests how this trade propagates across physical limits, manufacturing capacity, and policy constraints.

Key Takeaways

• AI scaling is increasingly a data-movement problem. More accelerators create more communication pressure, so network bandwidth, power per bit, latency, and serviceability increasingly shape how much compute can be used effectively.
• Copper does not disappear at one speed threshold. As bandwidth density rises, the economically useful electrical reach tends to shrink, while retimers, active copper, and better SerDes extend the electrical domain where the trade remains attractive.
• Pluggable optics, LPO, CPO, and optical I/O are different answers to the same boundary problem. They move signal processing and optical conversion to different physical locations, trading modularity and repairability against electrical loss, power, latency, and bandwidth density.
• Scale-up and scale-out need not transition on the same timetable. Short, tightly coupled links can preserve copper longer in some systems, while bandwidth-dense switch tiers may move toward CPO earlier; serviceability-sensitive scale-out links can keep pluggables relevant for years.
• The 2026 capacity chain shows that photonics has become strategic infrastructure. NVIDIA secured long-term capacity from Lumentum and Coherent, while Lumentum subsequently reserved InP substrate capacity from AXT through 2031.
• The optical bottleneck can migrate upstream and become geopolitical. U.S. scrutiny of Chinese optical transceivers exists alongside Chinese export controls affecting InP substrates. Yet Chinese suppliers still provide roughly two-thirds of global transceiver units, and industry analysis warns that Western suppliers cannot absorb that volume quickly. Downstream diversification therefore does not automatically create either upstream independence or near-term replacement capacity.

In This Article

1. AI Is Becoming a Data-Movement Machine
2. The Physical Problem: Electrical Reach Shrinks as Bandwidth Rises
3. The AI Interconnect Distance Map: Where Copper Ends and Optics Begins
4. Extending the Electrical Domain: Retimers, DAC, ACC and AEC
5. The Pluggable Optical Transceiver: Where Electricity Becomes Light Today
6. The Real Evolution: Moving the Optical Boundary Toward the ASIC
7. The LPO Bargain: Less DSP, More System Responsibility
8. CPO: When the Electrical Path Becomes Too Expensive
9. The CPO Paradox: Heat, Yield, Reliability and Serviceability
10. ELS: CPO Does Not Eliminate the Laser Supply Chain
11. Optical I/O: When Photonics Moves Beyond Networking
12. Scale-Up vs. Scale-Out: Two Networks, Two Optical Timelines
13. The Materials Paradox: Moving Light Inward Pushes the Bottleneck Upstream
14. The Value Chain Is Being Reassembled, Not Destroyed
15. Counterfactual Compression: What Would Have to Be True for the Optical Boundary Not to Move?
16. Conclusion: The Optical Boundary Is Moving Inward

AI Is Becoming a Data-Movement Machine

The phrase “AI compute” can create a misleading mental image. It suggests that the decisive work happens inside the arithmetic units of an accelerator and that everything outside the chip merely feeds it. In practice, modern training and increasingly large inference systems are distributed machines. A model may be partitioned across many accelerators. Different devices may hold different tensors, experts, layers, or shards of memory. Collective operations must move data among processors repeatedly. KV cache may need to be accessed or redistributed. Checkpointing and storage traffic must be absorbed. Network congestion or link instability can reduce the utilization of very expensive compute even when every GPU is technically functioning.

The result is a change in what “more compute” means. In a conventional server, adding processors could often increase capacity without demanding a proportional redesign of the entire surrounding network. In an AI cluster, adding accelerators frequently increases both compute and communication requirements because the accelerators are intended to cooperate on the same workload. The fabric therefore becomes part of the computer. A switch is not simply routing office traffic. It is helping determine how efficiently a distributed model can execute.

This pressure appears in two different forms. In scale-up systems, the goal is to make a relatively bounded group of accelerators behave more like one tightly coupled machine. Bandwidth density, latency, synchronization, and memory semantics matter intensely. The links are often short, but they must move enormous amounts of data per unit of time. In scale-out systems, many nodes and racks are connected into a larger cluster. Distances are longer, topologies are broader, and maintainability, routing, interoperability, and failure containment become increasingly important. Both domains need more bandwidth, but they optimize for different constraints.

Those constraints explain why the industry cannot solve the networking problem with one universal medium. Copper is attractive because it is cheap, familiar, electrically native to the ASIC, and easy to terminate over short distances. Optical fiber is attractive because attenuation does not rise in the same way with signaling frequency and distance, and because fiber can carry very high aggregate bandwidth without the weight and bulk of equivalent copper bundles. Yet optics also requires lasers, modulators, photodetectors, coupling, packaging, thermal control, and often digital signal processing. The architecture therefore trades one set of costs for another.

Historically, the industry has tried to keep the optical boundary far enough from the chip to preserve modularity. The ASIC drives electrical signals across package escape, board traces, connectors, and sometimes cable before reaching a pluggable transceiver at the front panel. That transceiver then performs the electrical-to-optical conversion. This separation is operationally elegant. A failed transceiver can be replaced without replacing the switch. Vendors can qualify modules independently. Network operators can choose reaches and optical formats by changing pluggables rather than redesigning the system.

The problem is that the electrical path between ASIC and front panel becomes more expensive as per-lane signaling rates rise. A 100G-per-lane or 200G-per-lane channel must survive package loss, PCB dielectric loss, conductor loss, vias, connectors, crosstalk, reflections, jitter, and other impairments. The industry can improve materials and routing, but the link budget remains finite. Keeping the old physical boundary may require stronger SerDes, retimers, DSPs, cleaner boards, more power, more cooling, and more engineering margin. At some point, preserving distance consumes enough resources that moving the optics inward becomes rational.

This is the deeper reason optical interconnect has become an AI infrastructure question rather than a telecom niche. The AI system is not merely transmitting more bits. It is demanding more bits per second from a fixed physical envelope: a package edge, a board, a switch faceplate, a rack power budget, a cooling system, and a cable-management volume. The relevant metric is therefore not only raw bandwidth. It is bandwidth density delivered at acceptable power, latency, reach, reliability, and serviceability.

The same logic also explains why the optical transition can accelerate even while copper shipments remain strong. AI growth expands the total number of links. Some short links can remain electrical while longer or denser links become optical. AECs can grow at the same time as CPO. Pluggable optics can grow at the same time as optical I/O research. The system is not moving through a clean replacement cycle. It is dividing into distance domains, with each domain choosing the cheapest architecture that still satisfies its bandwidth and reliability constraints.

For the AI Civilization Map, this makes fiber and distributed intelligence more than a networking category. It is the layer that determines whether compute resources can be aggregated into useful cognitive infrastructure. A separate Hi K Robot Matrix analysis of Marvell and AI data-center connectivity examines how value can accumulate wherever data must move. The present question is more physical: as that data movement grows, what medium can continue carrying it, and how close to the compute must the conversion to light occur?

The Physical Problem: Electrical Reach Shrinks as Bandwidth Rises

It is tempting to summarize the optical transition with a slogan such as “copper is too slow.” That is not technically precise. Electrical signals in copper propagate extremely quickly, and short copper channels can support extraordinary bandwidth. The real problem is not the speed of the electromagnetic wave in the conductor. It is preserving signal integrity across a practical channel as symbol rates, lane rates, and channel density rise.

At high frequencies, conductor loss increases. Skin effect pushes current toward the surface of a conductor, raising effective resistance. Surface roughness matters more. Dielectric loss in the PCB material accumulates. Vias and connectors introduce discontinuities. Crosstalk between nearby channels becomes harder to suppress. Reflections and impedance mismatch distort the eye. Package escape adds its own insertion loss. The receiver must distinguish increasingly small and distorted signal levels while the system is also trying to pack more channels into less space.

PAM4 signaling helps increase data rate by encoding two bits per symbol across four amplitude levels, but the price is reduced noise margin compared with simple binary signaling. Forward-error correction, equalization, feed-forward equalization, decision-feedback equalization, clock-and-data recovery, and sophisticated SerDes design can recover channels that would otherwise fail. These are engineering triumphs. They are also evidence that the electrical channel is being purchased with more silicon and energy.

This is why the useful concept is electrical reach, not a fixed distance at which copper suddenly stops working. A 1.6T aggregate link does not imply one universal copper limit because implementations differ in lane count, per-lane rate, cable type, board material, connector topology, error tolerance, equalization, and protocol. A short package trace at 200G per lane is not the same problem as a meter-scale passive cable, and neither is the same as a front-panel PCB path inside a 51.2T or 102.4T switch. The boundary is an economic engineering curve, not a cliff.

That curve matters because each additional centimeter of high-speed electrical path can demand disproportionate compensation as lane rates rise. If the channel can be shortened, the system may reduce transmitter swing, equalization burden, retiming, and heat. If it cannot be shortened, the industry can insert active silicon to restore the signal. That is the logic behind retimers and AECs. If active electrical rescue becomes too costly, the conversion to optics moves forward.

The power consequence is especially important in AI. The network power budget competes with the same facility power, rack power, cooling capacity, and board thermal envelope needed by accelerators. Saving a few watts on a single link can look trivial. Saving that amount across hundreds of ports in a switch and thousands of switches in an AI factory can become architecturally meaningful. NVIDIA’s 2026 Spectrum-X Ethernet Photonics material, for example, attributes a fivefold reduction in power per 1.6 Tb/s port to its co-packaged optical implementation relative to pluggable interconnects. The exact advantage of CPO will vary by system and comparison baseline, but the direction of the incentive is clear: at sufficiently high bandwidth density, the energy spent preserving an electrical channel becomes a first-order design constraint.

Latency has a similar structure. Modern retimers and DSPs are extremely fast, but they are not free in time. Signal processing, retiming, buffering, and FEC can introduce latency that may be acceptable in a scale-out fabric but less desirable in a tightly coupled scale-up system. Again, there is no universal rule that “optics is lower latency.” Optical links can include their own DSPs and FEC. The relevant comparison is between specific architectures. LPO seeks lower latency partly by removing the optical-module DSP. CPO can reduce the amount of electrical conditioning required before optical conversion. Optical I/O proposes an even more aggressive reduction in the electrical path.

The most useful way to visualize the transition is therefore as a shrinking electrical radius around the ASIC. In older architectures, that radius can extend across the board to the front panel and sometimes beyond through passive copper. As bandwidth density rises, the radius may contract to the board edge, then to an optical engine near the ASIC, and eventually to an optical chiplet inside the same package. Each contraction trades serviceability and modularity for lower electrical loss and potentially lower power per bit.

This is why the industry can spend decades improving copper while simultaneously investing billions in photonics. The two efforts are not contradictory. Better SerDes and active copper delay the point at which optics becomes necessary. Better photonics lowers the cost of moving that point inward. The architecture that wins in any given distance domain will be the one that delivers enough bandwidth with the best combined balance of power, latency, cost, reliability, manufacturability, and repairability.

The AI Interconnect Distance Map: Where Copper Ends and Optics Begins

A useful optical map begins with distance, but distance alone is not enough. The same ten centimeters can be easy or difficult depending on lane rate and packaging. The same two meters can be inexpensive with one cable architecture and impractical with another. Still, physical distance provides a first approximation because every additional segment of board, connector, or cable consumes part of the channel budget.

The first domain, inside the package and across nearby dies, remains the stronghold of electrical interconnect because the distance is extremely short and the electrical interface can be tightly co-designed with the silicon. Advanced packaging and die-to-die standards allow enormous bandwidth over tiny distances. This is the area optical I/O eventually seeks to penetrate, not because copper has become universally unusable, but because package-level bandwidth and power scaling may make optical escape attractive for certain future architectures.

The second domain is the board. Here electrical links encounter PCB routing constraints, connector loss, and topology complexity. PCIe and CXL are obvious examples. Retimers can regenerate these signals and extend their practical reach through large servers. Astera Labs markets its PCIe/CXL retimers specifically around signal-integrity challenges in AI and cloud systems and describes them as a way to extend reach rather than replace the electrical protocol. This illustrates a broader point: a retimer is not a competing network architecture. It is a device that preserves the electrical architecture by paying for additional reach in silicon.

The third domain, intra-rack cabling, is where copper and optics overlap most visibly. Passive DACs are attractive when distances are short enough. AECs insert active circuitry into the cable endpoints to recover and retime the signal, allowing thinner or longer copper links than a passive cable can sustain at the same rate. Active optical cables and short-reach pluggable optics become more attractive as distance or bandwidth rises. This is not a temporary anomaly. It is a rational segmentation of the physical problem.

The fourth domain, rack-to-rack and cluster networking, has historically been the natural territory of pluggable optics because fiber solves reach and cable-density problems while the pluggable form preserves field replacement. This is also where high-radix Ethernet and InfiniBand switches concentrate an enormous number of high-speed lanes. The switch faceplate and the electrical distance from switch ASIC to front-panel modules therefore become increasingly difficult as switch capacity rises. CPO first becomes compelling at this aggregation point because one optical switch can replace a large number of retimed front-panel electrical paths.

The fifth domain, data-center and campus interconnect, is already optical by necessity. The architectural question there is not whether to use copper but which optical technology, reach, wavelength plan, coherent scheme, and fiber topology best fit the traffic. That layer remains important, but the most interesting AI-era shift is happening closer to the processors, where optics is advancing into distances that were once assumed to belong permanently to copper.

This distance map also clarifies why headlines about a “CPO transition” can be misleading. A CPO switch can coexist with pluggable transceivers elsewhere in the same network. An AI rack can use active copper for some internal connections and optical links for others. Optical I/O could eventually appear inside an accelerator package while standard Ethernet pluggables remain widespread in the scale-out fabric. The industry is not choosing between copper and fiber once. It is choosing repeatedly at every boundary.

The central movement is directional: the optical boundary tends to migrate inward first where bandwidth density and electrical loss become most expensive. That makes the switch ASIC a logical early battleground for CPO, the intra-rack link a battleground for DAC versus AEC versus short-reach optics, and the package edge a potential future battleground for optical I/O.

For the broader infrastructure view beyond this inward-moving boundary, see The Fiber Limit of AI Civilization, which maps fiber, pluggables, near-package and co-packaged optics, optical switching, and long-reach architecture across rack, campus, and regional AI scaling.

Extending the Electrical Domain: Retimers, DAC, ACC and AEC

Before an industry replaces a mature medium, it usually spends years extending it. Copper is no exception. The economics are powerful: electrical links avoid lasers and photonic alignment, connect naturally to ASIC SerDes, and can be inexpensive and easy to service. The rational response to shrinking electrical margin is therefore to preserve copper wherever the cost of doing so remains lower than optical conversion.

A retimer receives a degraded electrical signal, recovers timing and data, and retransmits a newly conditioned signal. In simplified terms, it breaks one difficult electrical channel into two easier ones. That makes retimers particularly useful across long or complex PCIe/CXL board paths. The trade is straightforward. Reach and signal integrity improve, but the system adds silicon, power, latency, cost, and another active component that must be qualified.

A redriver is a lighter intervention. Rather than fully recovering the clock and regenerating the bits, it applies analog signal conditioning to improve the channel. Active copper cables can use combinations of drivers, redrivers, retimers, equalizers, or clock-and-data recovery functions depending on the implementation. This is why the marketing labels ACC and AEC do not always describe one identical internal architecture across vendors. The more useful distinction is between passive copper and cables that use active electronics to increase reach or reduce the thickness and loss of the copper channel.

Direct attach copper remains attractive for the shortest links because it minimizes conversion overhead. But higher lane rates reduce passive reach and can make thick bundles difficult to route. Active electrical cables respond by placing signal-conditioning silicon in the cable ends. Credo, one of the major AEC suppliers, now markets AEC products from 100G through 1.6T and frames the technology as a way to extend copper into bandwidth and reach domains where passive cables become difficult. The structural importance of AEC is not any single vendor’s market share. It is the architectural role: AEC converts silicon and power into additional copper reach.

That role is especially valuable inside racks. A rack is a constrained physical system. Operators care about cable bend radius, weight, airflow obstruction, connector density, installability, and replacement. AEC can sometimes deliver a lower-power, lower-cost path than optics while preserving enough reach for rack-level links. If the system is redesigned around denser racks, those short copper links can grow even as optics moves inward elsewhere.

This is why AEC is better understood not simply as a bridge waiting for CPO to arrive. In some domains it may be transitional; in others it may remain the preferred solution for years. CPO solves a different point in the topology: it reduces the electrical distance between a high-bandwidth ASIC and its optical engines. It does not automatically eliminate every short cable in the rack. Optical I/O may eventually reach some of those links, but only if its system cost, reliability, and packaging economics justify the move.

The broader lesson is that every electrical-extension technology reveals the same constraint. Retimers, redrivers, better PCB materials, active cables, and stronger SerDes are all attempts to buy more electrical distance. They can be extremely successful. Their success does not invalidate the optical thesis; it helps define the price at which the optical boundary moves. If additional electrical reach remains cheap, optics stays farther away. If additional electrical reach becomes power-hungry and complicated, optics moves closer.

The Pluggable Optical Transceiver: Where Electricity Becomes Light Today

The front-panel optical transceiver has been one of the most successful modular abstractions in data-center networking. It creates a clean boundary between a switch or server and the fiber plant. On the host side, the module receives high-speed electrical lanes. Inside the module, electronics and photonics condition, transmit, receive, and monitor the link. On the network side, optical fiber carries the signal across distances that would be difficult or inefficient for copper.

Calling the module a “laser in a box” understates how much system engineering it contains. A modern high-speed transceiver can include a digital signal processor, SerDes interfaces, laser drivers, transimpedance amplifiers, photodiodes, modulators or directly modulated laser structures, wavelength-control elements, photonic integrated circuits, thermal control, microcontrollers, optical connectors, and highly precise fiber coupling. At 800G and 1.6T, the module is a small mixed-signal computing and photonic system.

The DSP: Paying for Signal Independence

The module DSP is often described as a translator, but its deeper value is decoupling. It allows the optical module to receive an imperfect electrical channel, recover the data, perform equalization and coding functions, and drive the optical link with a clean, well-defined signal. On receive, it can compensate for impairments and deliver data back to the host interface. That intelligence helps preserve interoperability and operating margin across different switches, boards, modules, temperatures, and component tolerances.

The cost is power and latency. As rates rise, DSP complexity can become a significant share of the module’s energy budget. The host ASIC may already contain powerful equalization, while the module performs another layer of retiming and conditioning. That duplication is exactly what LPO questions. But the DSP’s power is better understood not as waste in isolation, but as a trade for robustness, reach, diagnostic capability, and a modular boundary that network operators value.

The Laser: Generating the Optical Carrier

Silicon is an extraordinary electronic and photonic routing platform, but it is not an efficient native light emitter because of its indirect bandgap. High-performance data-center optical systems therefore often rely on III-V compound-semiconductor materials, especially indium phosphide, for lasers and related active optical devices. Companies such as Lumentum and Coherent have deep expertise in these technologies, including continuous-wave lasers, electro-absorption modulated lasers, photodiodes, and other components used across data-center optics.

This distinction between generating light and routing or modulating light becomes crucial in CPO. Silicon photonics can integrate waveguides, modulators, couplers, and detectors near switch silicon, while the laser can remain separate as an external source. The architecture can move the optical engine inward without placing every optical function next to the hot ASIC.

The Modulator and Photonic Integrated Circuit

Light must be encoded with information. That can happen by directly modulating a laser or by using a separate modulator that changes the optical carrier. Silicon photonics has become important because it allows optical structures to be fabricated with semiconductor processes and integrated at high density. InP devices can also combine active optical functions. Thin-film lithium niobate is emerging as another electro-optic platform with high bandwidth and low optical loss, although its ultimate manufacturing role in AI interconnects remains unsettled.

Assembly: Where Nanometers Meet Glass Fiber

The electronic and photonic dies still have to be connected to fibers. Optical coupling tolerances, thermal drift, epoxy, connector design, test, and manufacturing yield become significant. This is why precision assembly companies and advanced packaging providers remain important even as the product form changes. CPO may remove a familiar front-panel transceiver, but it does not remove the requirement to align fibers to optical structures, test engines, manage lasers, and build reliable field-service interfaces.

The pluggable architecture survives because it isolates those complexities in a replaceable unit. Its weakness is that the unit sits at the front panel, forcing the high-speed electrical signal to travel from the ASIC across the board before reaching optics. The next architectural steps can be understood as attempts to keep some of the modular advantages while reducing the electrical path.

The Real Evolution: Moving the Optical Boundary Toward the ASIC

The optical-interconnect debate becomes much clearer if every architecture is placed on one axis: where does the high-speed electrical signal end and the optical signal begin? The form factor, component list, and vendor ecosystem may differ, but the migration can be read as a progressive movement of that conversion point.

Front panel → front panel without a module DSP → inside the chassis → beside the ASIC → package edge. Read along that axis and the architecture debate becomes a migration of the conversion point rather than a contest among product labels.

1. DSP pluggable optics — front panel. The module solves the optical-reach problem beyond the chassis, but the high-speed board path remains and the module DSP adds power.
2. LPO — front panel, with less digital processing in the module. It removes much of the module DSP and retiming overhead, but shifts more responsibility to host SerDes quality, calibration, qualification, and end-to-end link engineering.
3. On-board optics — inside the chassis. Moving the conversion point closer to the ASIC shortens part of the front-panel electrical path, while making replacement and service more difficult.
4. CPO — adjacent to the ASIC on a common package or substrate. It removes most of the high-speed PCB path between switching silicon and optics, but concentrates packaging, yield, thermal, connector, and repair challenges.
5. Optical I/O — package edge or chiplet level. It pushes the same idea toward the processor package itself, reducing electrical escape across the board while demanding new interfaces, laser architectures, packaging methods, and ecosystem maturity.

The progression shows why LPO and CPO are better understood as distinct architectural responses rather than two versions of the same solution. LPO leaves the optical module at the faceplate and attacks DSP overhead. CPO attacks the physical electrical distance itself by moving optical engines next to the switching or compute ASIC. Optical I/O pushes the same principle farther inward, potentially allowing a processor package to export bandwidth optically instead of driving long board-level SerDes channels.

It also explains why the transition can be nonlinear. The industry may adopt LPO in some pluggable environments while deploying CPO in the highest-radix switch systems. It may continue using DSP-based pluggables where interoperability and reach matter most. It may deploy optical I/O in specialized accelerator systems before general-purpose servers. The stages are not mutually exclusive generations like 4G and 5G. They are architectural positions that can coexist in different distance and reliability domains.

The deeper system trend is nevertheless visible. The amount of electrical distance between the highest-bandwidth ASIC and the optical network is becoming a design variable rather than a fixed assumption. Once that happens, optics stops being an external communications subsystem and becomes part of the compute package architecture.

The LPO Bargain: Less DSP, More System Responsibility

Linear Pluggable Optics is one of the most revealing architectures because it separates two problems that are often conflated: the location of the optics and the amount of signal processing inside the module. LPO keeps the familiar pluggable form factor at the front panel but removes the traditional retiming DSP from the module. The host ASIC’s transmitter and receiver equalization do more of the work, while the optical module uses a more linear analog path through drivers, TIAs, photonics, and associated control circuitry.

The attraction is straightforward. Removing the module DSP can reduce power, latency, and component cost. It also preserves the operational advantages of a pluggable optical module: front-panel serviceability, familiar cabling, and the ability to replace an optical unit without replacing the switch ASIC. This makes LPO an attempt to keep the modularity of the old boundary while making that boundary energetically lighter.

The challenge is that the DSP used to absorb a great deal of channel variation. Without it, the end-to-end link becomes more dependent on the host SerDes, PCB path, optical module linearity, calibration, and system-level margin. That can narrow the engineering tolerance and complicate qualification. Troubleshooting also becomes more system-oriented because electrical and optical performance are more tightly coupled.

It would be too strong, however, to describe LPO as inherently non-interoperable or usable only by hyperscalers. The LPO Multi-Source Agreement was created precisely to standardize interfaces and enable multi-vendor operation. In March 2025 the group released a specification for 100G-per-lane linear pluggable modules supporting up to 800G and described ongoing work toward 200G-per-lane operation. Industry demonstrations have also focused on interoperability among hosts, optics, and test equipment. The correct conclusion is therefore not that LPO abandons standards, but that it moves more responsibility for link quality from a self-contained module DSP into the end-to-end electrical and optical system.

This makes LPO structurally attractive in environments where the system owner can tightly qualify the host and module combination and where power savings justify that additional engineering. A hyperscaler or vertically integrated platform provider may be able to control more variables than a heterogeneous enterprise network. But as standards and interoperability mature, the addressable environment can broaden.

LPO also need not be assumed to be a temporary technology that disappears the moment CPO matures. CPO changes packaging, service, manufacturing, and repair in ways that may not be appropriate for every switch or every link. If pluggability remains valuable and the host SerDes can carry the electrical path to the front panel efficiently enough, LPO can remain a durable middle architecture. Conversely, if front-panel electrical loss becomes too expensive at future switch densities, removing the DSP will not solve the underlying distance problem. That is the point at which CPO becomes more compelling.

The most important lesson from LPO is conceptual: the first step toward lower-power optics does not necessarily require moving the optics. The industry can first remove redundant digital processing. Only when the board path itself becomes the dominant constraint does the optical boundary need to move physically inward.

CPO: When the Electrical Path Becomes Too Expensive

Co-Packaged Optics attacks the problem that LPO leaves intact. Even if a front-panel module has no DSP, the switch ASIC must still drive high-speed electrical lanes through package escape and PCB traces to reach that module. At sufficiently high lane rates and switch radix, this path can require large I/O power and consume substantial board routing resources. CPO shortens the electrical channel by placing optical engines adjacent to the ASIC on the same package or substrate. The data becomes optical before it crosses the long board path.

Broadcom’s public CPO architecture descriptions frame the problem in exactly these terms. Conventional pluggable modules use high-power DSPs partly to compensate for interconnect losses between the switch ASIC and front panel. Linear pluggables remove the module DSP but still inherit the host-to-module electrical path. CPO places the optics near the switch silicon and therefore reduces that path loss. The attraction grows as SerDes rates and switch bandwidth rise.

NVIDIA’s 2026 Spectrum-X Ethernet Photonics system turns the same principle into an AI-factory architecture. NVIDIA says its co-packaged silicon photonic engines reduce power per 1.6 Tb/s port by five times compared with pluggable interconnects. The SN6800 switch is described as delivering 409.6 Tb/s of total bandwidth across 512 ports of 800 Gb/s or 2,048 ports of 200 Gb/s. NVIDIA also emphasizes detachable fiber connectors, preassembly testing, and manufacturing automation—details that matter because CPO must solve not only power but also yield, assembly, and serviceability.

The important point is not whether every vendor achieves the same power ratio. Vendor comparisons use different baselines, products, lane counts, and assumptions. The structural signal is that both major switch-silicon ecosystems are investing in CPO because the electrical I/O burden of very high-radix switches has become large enough to justify a major packaging change.

NVIDIA Makes Photonics a Strategic Supply Chain

On March 2, 2026, two weeks before GTC, NVIDIA made the industrial implications explicit. It announced an approximately $2 billion investment in Lumentum and a separate approximately $2 billion investment in Coherent. The combined announced equity investment was therefore roughly $4 billion. More important than the headline amount, both agreements included multibillion-dollar purchase commitments and rights to future capacity. The Lumentum agreement covered future access to advanced laser components; the Coherent agreement covered future access and capacity for advanced laser and optical networking products.

Lumentum and NVIDIA said optical interconnect technology and package integration are critical to the continued scaling of AI factories because they improve the energy efficiency and resiliency of large-scale networks. Coherent and NVIDIA described optical interconnects and advanced package integration as foundational to the next phase of AI infrastructure. Those statements are important because they show how NVIDIA itself is redefining optics: not as a detachable accessory purchased after the compute system is designed, but as a technology whose R&D, manufacturing capacity, and package integration must be secured alongside the compute roadmap.

The structure of the agreements is even more informative than the rhetoric. NVIDIA did not merely commit to buying finished components. It invested capital in the suppliers, committed future purchasing, and obtained capacity access rights while both suppliers expanded U.S.-based manufacturing. That resembles the behavior of an infrastructure company securing a bottleneck input before the demand peak arrives. It suggests that laser and photonics capacity are joining HBM, advanced packaging, power equipment, and networking silicon as strategic capacity categories in the AI buildout.

By March 2026, the optical transition was no longer confined to technology roadmaps. NVIDIA had begun financing part of the industrial capacity associated with it. That does not establish a universal CPO end state. It establishes something more modest and directly observable: NVIDIA committed multiyear capital, purchase commitments, and capacity rights to advanced optics suppliers.

CPO Is an Architecture, Not a Universal End State

That distinction matters because CPO is sometimes described as the final destination of all data-center optics. The evidence does not support such a simple conclusion. Pluggable optics remain highly attractive in networks where field replacement, modular upgrades, multi-vendor procurement, and reach flexibility matter more than the last increment of power efficiency. CPO is strongest where the electrical path from a bandwidth-dense ASIC has become sufficiently costly that a packaging redesign pays for itself.

This is why switch silicon is a logical first large-scale CPO target. A high-radix switch concentrates hundreds of very fast lanes at one package. Moving optical engines closer to that package can remove a large bundle of lossy electrical channels in one architectural step. A general-purpose server with fewer optical ports may have a weaker incentive. A scale-up accelerator fabric may eventually have an even stronger incentive if package-level bandwidth and power become binding. The transition follows the constraint, not the marketing label.

The CPO Paradox: Heat, Yield, Reliability and Serviceability

Moving optics closer to the ASIC solves one physical problem by creating several manufacturing and operational ones. A pluggable transceiver is isolated from the switch package, can be tested separately, and can be replaced from the front panel. A co-packaged optical engine sits much closer to expensive switch silicon. That proximity raises the cost of failure and makes thermal management, known-good-die testing, fiber attachment, and repair architecture far more important.

The thermal issue is more subtle than saying that “lasers cannot tolerate heat.” Semiconductor lasers are temperature-sensitive, and efficiency, wavelength, reliability, and lifetime all depend on operating conditions. High-power switch ASICs also create intense thermal environments. Integrating the light source directly next to the hottest logic can therefore complicate both cooling and reliability. One common response is to separate the laser from the modulator and optical engine, keeping the high-power light source in a more serviceable location while sending continuous-wave light to the co-packaged photonics.

Yield is another constraint. In a conventional module, a defective photonic component can be discarded without sacrificing the switch ASIC. In a tightly integrated package, a bad optical engine discovered late in assembly can threaten the economics of the entire unit. NVIDIA’s emphasis on screening optical components before attachment and using detachable fiber connectors reflects this manufacturing reality. Broadcom has similarly highlighted field-replaceable external laser modules in CPO designs. These are not peripheral details; they are the mechanisms that make integration economically tolerable.

Serviceability also changes. Data-center operators have spent decades building workflows around replacing pluggables. A CPO system cannot simply assume that failures disappear. It must decide which pieces remain replaceable: external lasers, fiber connectors, optical engines, or the switch unit itself. Reliability engineering therefore becomes part of the architecture. The winning CPO design may not be the one with the maximum possible integration. It may be the one that places each function at the point where performance and field repair reach the best compromise.

This is the paradox of CPO. It moves optics inward to escape electrical loss, then partially disaggregates optical functions again to manage heat, yield, and maintenance. The result is not a monolithic “photonic chip.” It is a system of carefully separated functions connected through a new package hierarchy.

ELS: CPO Does Not Eliminate the Laser Supply Chain

The external light source is one of the clearest examples of architectural disaggregation. In many CPO and silicon-photonics designs, the optical engine near the ASIC does not need to generate its own light. An external continuous-wave laser can provide the optical carrier through fiber. Modulators near the ASIC then encode data onto that light. The laser and the modulation function are therefore physically separated.

This arrangement has several advantages. The laser can be kept away from the highest thermal load. It can be designed as a replaceable unit. Multiple optical engines can potentially be served by centralized or distributed laser sources depending on architecture. The expensive switch package does not have to be discarded solely because a laser source degrades. At the same time, the modulator remains close enough to the ASIC to preserve the electrical-reach benefit of CPO.

This is why CPO does not imply that laser suppliers disappear. It changes the type of laser and where the laser sits. High-power continuous-wave sources can become more important because they feed silicon-photonic or other modulator-based engines. The NVIDIA agreements with Lumentum and Coherent reinforce that point: NVIDIA is moving toward co-packaged photonics while simultaneously securing advanced laser capacity. If CPO simply eliminated laser value, those two actions would be contradictory. In reality, they are complementary.

The broader lesson is that architectural integration does not necessarily mean functional integration. Signal processing, light generation, modulation, detection, and fiber coupling can migrate to different physical locations. Some functions move toward the ASIC because electrical distance must shrink. Other functions move away because thermal or reliability constraints make separation desirable. The supply chain is reassembled around the new optimum.

This distinction also helps explain why the optical value chain can deepen as the module form changes. A conventional transceiver bundles many functions into one replaceable box. CPO unbundles that box into optical engines, external lasers, package interconnects, fiber assemblies, switch silicon, and manufacturing processes. The visible module may become less central while the invisible photonic infrastructure behind it becomes more specialized.

Optical I/O: When Photonics Moves Beyond Networking

CPO is often discussed as if it were the final stage of bringing light toward compute, but another architecture goes farther. Optical I/O moves the optical interface to the package edge or chiplet level, allowing an accelerator, CPU, memory fabric, or custom ASIC to communicate optically without first driving a long board-level electrical link to a separate network interface.

The distinction from switch CPO matters. A CPO Ethernet switch still performs network switching and exports optical ports. Optical I/O can become a more general package-level I/O technology. It may carry die-to-die traffic, accelerator fabrics, memory disaggregation, or other high-bandwidth links that today use electrical SerDes across packages and boards. In other words, CPO moves the network optics to the switch silicon; optical I/O can move photonics into the computing fabric itself.

Ayar Labs illustrates the architecture with its TeraPHY optical I/O chiplet, which the company describes as pairing with external multi-wavelength light sources and providing multiple optical ports through a chiplet that interfaces electrically to the host package. The company’s performance claims are best read as vendor-specific rather than universal benchmarks, but the topology is the important signal: the optical engine is designed as a package-level companion to compute rather than as a front-panel transceiver.

If this architecture scales, it could change how systems are composed. Memory and accelerators could potentially be placed farther apart without paying the full electrical channel penalty. High-bandwidth package escape could be optical rather than electrical. Boards could carry more fiber and fewer high-speed copper traces. The physical boundary of a “computer” could expand from one package or board into a photonic fabric.

That outcome is not guaranteed. Optical I/O must compete with rapidly improving electrical die-to-die interfaces, advanced packaging, retimers, shorter board paths, and proprietary scale-up fabrics. It must also solve light-source distribution, package yield, fiber attachment, thermal management, connectorization, software and protocol interfaces, and cost. The engineering threshold may arrive earlier in some accelerator architectures than in general-purpose servers.

Yet optical I/O matters for the long-term map because it shows the direction of pressure. The optical boundary that once sat at the edge of the data center moved to the rack, then to the switch faceplate, and now to the switch package. Optical I/O asks whether the next move is into the processor package itself. If that happens at scale, photonics will no longer be an external network connecting computers. It will become part of what a computer is.

Scale-Up vs. Scale-Out: Two Networks, Two Optical Timelines

The most common mistake in optical-interconnect forecasts is to treat the entire AI network as one market moving on one schedule. Scale-up and scale-out fabrics have different constraints, and those differences can support different optical architectures for a long time.

Scale-Up: Bandwidth Density and Latency First

Scale-up fabrics try to make a bounded set of processors cooperate with very high bandwidth and low latency. Distances can be short, but that does not make the problem easy. The total bandwidth leaving a processor complex can be enormous. Links may participate directly in collective operations or memory-like access patterns. Every additional watt per bit multiplies across a dense accelerator system. Cable bulk and connector count also become serious mechanical constraints.

Copper is strong in this environment precisely because the distances are short. Proprietary electrical fabrics can exploit close physical placement and tight co-design. AECs can extend the short-distance domain. But as lane rates and total package I/O continue to rise, electrical escape can consume increasing power and package perimeter. That makes scale-up one of the most plausible long-term targets for optical I/O or other near-package photonics if those technologies can meet the required reliability and cost.

Scale-Out: Reach, Modularity and Operations Matter More

Scale-out networks connect servers and racks across larger topologies. Here a link failure affects operations differently. Network teams value hot-swappable modules, standard fiber interfaces, multiple reach options, and the ability to replace or upgrade optics independently of the switch. Pluggable optics therefore retain powerful economic advantages. Even if a CPO switch lowers power, operators must weigh that benefit against maintenance, sparing, qualification, and deployment flexibility.

This is why pluggable optics can continue growing in absolute volume even as CPO adoption begins. AI factories are expanding rapidly. More racks create more scale-out links. The addressable network can grow faster than any one architecture loses share. At the same time, the most bandwidth-dense switching tiers may adopt CPO because their front-panel electrical paths become unusually expensive.

Two Timelines, Not One Replacement Cycle

A plausible structural outcome is therefore a mixed network. Short internal links may remain electrical or use AEC. Rack-to-rack links may use DSP pluggables or LPO. High-radix aggregation switches may adopt CPO. Long-reach links remain optical and often pluggable. Package-level fabrics may begin experimenting with optical I/O. The precise mix can change with each system generation, and the transition is better analyzed by distance and function than by one headline technology.

This perspective also prevents a false choice between “CPO wins” and “pluggables survive.” Both statements can be true in different domains. The more useful question is: which interconnect segment is paying the highest price for electrical reach at a given point in time? That segment has the strongest incentive to move the optical boundary inward.

Scale-up and scale-out are not the end of the distance hierarchy. When power, land, cooling, or grid constraints force compute to spread across campuses and regions, the problem becomes scale-across: keeping geographically separated AI capacity coordinated over much longer optical paths. That broader transition is examined in From Scale-Up to Scale-Across: Why AI Civilization Cannot Stay Centralized Forever.

The Materials Paradox: Moving Light Inward Pushes the Bottleneck Upstream

Once optics becomes part of AI compute architecture, the material stack underneath the optical engine becomes strategically important. The headline terms—CPO, LPO, optical I/O—describe system architecture. They do not describe the materials needed to generate, modulate, guide, detect, and package light. Those functions can depend on different physical platforms.

Indium Phosphide: The Active Material Behind High-Performance Light Sources

Indium phosphide is a III-V compound semiconductor with a direct bandgap, making it well suited to lasers and other active photonic devices at telecom wavelengths. That is fundamentally different from silicon, whose indirect bandgap makes efficient light generation difficult. InP therefore occupies a critical position in the optical stack: even when waveguides and modulators are implemented in silicon photonics, the system may still rely on InP-based lasers to provide the optical carrier.

Coherent’s 2026 photonics demonstrations illustrate the breadth of the platform, including high-power continuous-wave lasers for CPO and silicon-photonics systems as well as high-speed electro-absorption modulated lasers. Lumentum has likewise built its data-center strategy around advanced lasers and photonic components. NVIDIA’s decision to commit billions of dollars and future purchase capacity to both companies indicates that these active optical devices are becoming a strategic manufacturing category.

Silicon Photonics: Moving Optical Functions Into Semiconductor Manufacturing

Silicon photonics brings waveguides, modulators, detectors, couplers, and other photonic structures into a silicon-compatible manufacturing environment. Its strategic value is integration density and process scalability. Rather than assembling every optical function as a discrete device, photonic integrated circuits can combine many channels and optical elements on a die placed close to switch silicon.

That integration is one reason CPO is becoming practical. A high-radix switch can place multiple optical engines around an ASIC, each engine carrying many optical lanes. The architecture turns optical connectivity into something closer to package I/O. But silicon photonics does not eliminate compound semiconductors. It often works with external InP lasers, creating a heterogeneous system in which different materials perform the functions they are physically best suited to perform.

TFLN: An Emerging Modulator Platform, Not a Predetermined Winner

Thin-film lithium niobate has re-entered the optical conversation because it combines strong electro-optic interaction with low optical loss and high bandwidth. Recent academic work has demonstrated TFLN modulators operating at very high electro-optic bandwidths and high PAM4 data rates. These properties make TFLN interesting for future high-speed modulation and integrated photonics.

It would be premature, however, to describe TFLN as a predetermined or exclusive solution for 1.6T or 3.2T interconnects. Silicon photonics, InP modulators, EMLs, and hybrid approaches continue to improve. The decisive questions will include wafer-scale manufacturability, packaging, drive voltage, optical loss, thermal stability, yield, cost, and compatibility with existing foundry ecosystems. TFLN is best understood as an emerging material option that expands the design space rather than as a predetermined replacement for silicon photonics.

InP Becomes a Strategic Capacity Constraint

The most important 2026 evidence may be upstream of the laser companies themselves. In April, AXT said it had completed an approximately $632.5 million capital raise to support its Tongmei subsidiary’s indium-phosphide capacity expansion and R&D in products including 6-inch InP. The company explicitly linked InP substrates to the high-speed optical data transmission required in AI-focused data centers. By the second quarter, AXT said data-center optical-connectivity demand had driven its highest quarterly InP revenue to date.

Then on July 29, AXT and Lumentum announced a long-term supplier agreement under which AXT would reserve minimum annual InP wafer-substrate capacity for Lumentum through December 31, 2031. Lumentum agreed to pay two $43.5 million deposits, for a total of approximately $87 million, in connection with the reserved capacity. The sequence is structurally revealing. NVIDIA secured photonics capacity from Lumentum and Coherent. Lumentum in turn secured substrate capacity from AXT. A demand signal at the accelerator and networking layer propagated upstream into crystal growth and wafer manufacturing.

This is how a specialized material becomes AI infrastructure. The bottleneck no longer ends at the optical transceiver or even at the laser fab. It can move to substrate diameter, crystal quality, wafer yield, epitaxy, fab capacity, and the pace at which manufacturing can move toward larger wafers. AXT’s focus on 6-inch InP and Lumentum’s subsequent announcement of a U.S. laser facility leveraging 6-inch InP reflect the same manufacturing logic: scaling photonics requires not only better device designs but a larger and more repeatable industrial base.

AI optical scaling therefore eventually becomes a materials-manufacturing problem. If the industry needs many more optical lanes, it needs many more lasers and detectors. Those devices require compound-semiconductor wafers, processing equipment, epitaxy, test, packaging, and skilled manufacturing. The farther optics moves into the compute fabric, the more these upstream capabilities become part of the effective compute supply chain.

The Geopolitics of Photons: Securing the Module Does Not Secure the Material

The photonic supply chain also reveals an important geopolitical asymmetry. Reuters first disclosed on August 4 that the Federal Communications Commission (FCC), which oversees the U.S. telecom industry, was working on a draft measure that could bar imports of new models of Chinese optical transceivers. The proposal was framed around national-security risks to data-center infrastructure and, at the time of the report, could still be modified or shelved. On August 5, Reuters reported the market reaction: shares of major Chinese optical-hardware suppliers fell sharply after the disclosure. That follow-up identified export-dependent suppliers including Zhongji Innolight, Eoptolink and Suzhou TFC Optical Communications and reported that Innolight had generated 62% of its first-quarter revenue from the United States.

The immediate equity-market reaction was consistent with a geographic-substitution interpretation. Chinese optical-module shares fell, while several U.S.-listed optical suppliers rallied; reports on August 4 showed Coherent rising by double digits while Lumentum also gained sharply. But the industrial reality is more constrained than the first stock-market reaction suggests. A regulation can change who is permitted to sell into a market much faster than a supply chain can recreate cleanroom capacity, automated optical alignment, test throughput, field qualification, and high-volume manufacturing yield.

The Ban Paradox: Regulatory Speed vs. Manufacturing Time

Optical transceivers are not a peripheral accessory in an AI factory. They are the conversion layer that turns electrical signals into optical signals and back again, allowing switches, racks, and clusters to exchange data at 800G, 1.6T, and beyond. In that sense, they function like a vascular layer for distributed compute: a cluster can own extremely capable accelerators and still leave them underutilized if the network cannot move data fast enough between them.

That makes the scale of Chinese manufacturing strategically important. Counterpoint Research estimates that Chinese optical-module manufacturers collectively account for nearly two-thirds of global unit supply and about 60% of global optical datacom transceiver revenue. It estimates Zhongji Innolight alone at roughly 27% of global data-center transceiver revenue, with Eoptolink also among the leading suppliers. The point is not that every high-speed module is Chinese. It is that the existing AI buildout has become deeply dependent on a manufacturing base that cannot be replaced simply by changing a procurement spreadsheet.

This dependence is not purely about labor cost. Counterpoint describes the advantage of leading Chinese module suppliers as a system-integration and scale capability: thermal design, optical alignment, packaging, automated assembly, testing, yield management, and the ability to deliver very large volumes into hyperscaler qualification cycles. These are manufacturing capabilities accumulated through repeated production, not merely component purchases. In advanced optics, the difference between designing a module and producing millions of qualified modules is itself a technological capability.

The supply chain is also circular rather than one-directional. Chinese module makers commonly rely on U.S.-designed DSPs from Broadcom and Marvell and on high-performance lasers or optical chips from suppliers including Lumentum, Coherent, and Mitsubishi Electric. Industry BOM estimates vary substantially by architecture, but DSPs and active optical devices are consistently among the highest-value components in high-speed modules. The result is a symbiotic loop: Western firms control several of the most valuable semiconductor and laser functions, while Chinese firms control a large share of the high-volume integration, packaging, test, and delivery layer that turns those components into deployable transceivers.

This is why a blanket restriction could create collateral damage on both sides. Chinese module makers would lose access to a critical market, but Western DSP and laser vendors could also lose a large downstream channel for their components. More importantly for U.S. AI infrastructure, Counterpoint argues that Western suppliers do not currently possess enough cleanroom capacity, automated packaging infrastructure, and yield scale to absorb Innolight and Eoptolink volume within a 12-to-24-month horizon. A missing batch of transceivers can delay cluster turn-up even when the GPUs, switches, and power infrastructure are already installed.

Why Western Photonics Capacity Does Not Yet Match Existing Module Scale

Coherent and Lumentum do have formidable optical technology, and both are expanding aggressively. Coherent says it is doubling InP output capacity in 2026 and again in 2027, while ramping 6-inch InP production in Texas and Sweden and adding capacity in Switzerland. In June, it announced a CHIPS Act letter of intent for up to $50 million to expand its 6-inch InP semiconductor manufacturing facility in Sherman, Texas. Lumentum announced a 240,000-square-foot Greensboro, North Carolina facility for advanced InP-based CW and ultra-high-power lasers, with production expected to ramp in mid-2028 and with NVIDIA identified as a customer.

Those investments matter, but they also illustrate the distinction between device capacity and finished-module capacity. Much of the announced Western expansion is concentrated in the scarce upstream photonic devices that carry high technical value: InP wafers, lasers, detectors, and related optical components. Expanding these layers is necessary, but it does not instantly reproduce the downstream module-manufacturing throughput already operating in China and Southeast Asia. A transceiver still has to integrate silicon, lasers, optics, fibers, connectors, thermal structures, firmware, and test into a qualified product at very high volume.

The structural asymmetry can therefore be stated more precisely. The United States retains leading positions in several high-value design and component layers. China retains substantial scale in the industrial system that converts those components into high-volume finished optical hardware. Neither capability is trivial, and neither can be recreated immediately by the other side. In AI infrastructure, “making the chip” and “making the thing” are different forms of technological capability.

The Upstream Loop: InP and Indium Still Cross the Same Geopolitical Boundary

Upstream exposure then moves in the opposite direction. AXT is a U.S.-listed company headquartered in Fremont, but it states that its manufacturing operations are in China through its Chinese manufacturing structure. China added indium-phosphide substrates to its export-control list on February 4, 2025. AXT has disclosed that the substrate product families manufactured by Tongmei require permits from China’s Ministry of Commerce before export and has described InP export permits as the most significant challenge it currently faces. In January 2026, AXT explicitly lowered its fourth-quarter revenue expectation because fewer InP export permits had been issued than it expected.

The material geography extends even farther upstream. U.S. Geological Survey data show that China accounted for roughly 70% of global refined indium production in 2024 and about 69% of estimated 2025 output. Refined indium is not the same thing as an InP wafer, so this statistic does not directly measure InP-substrate market share. It does, however, show that one of the elemental inputs behind the compound-semiconductor ecosystem is itself highly concentrated geographically.

The result is a two-sided pressure. The United States may seek to reduce dependence on Chinese downstream optical modules while part of the upstream InP substrate and indium chain remains exposed to Chinese manufacturing or export licensing. That does not mean the United States has no alternative. Coherent is building more domestic 6-inch InP capacity, and Lumentum is adding a U.S. laser facility that will leverage 6-inch InP wafers. Supply chains can respond to policy pressure. But building new materials and photonics capacity takes time, capital, yield learning, customer qualification, and specialized equipment.

What Could the Final Restriction Actually Look Like?

The wording reported by Reuters matters because the draft was described as targeting new models of Chinese data-center components. That creates a plausible policy path in which access for future generations could be tightened more than already-deployed or previously qualified hardware. Such a structure would have the effect of reducing future dependence while limiting the risk of an immediate supply shock in existing AI clusters.

But this remains an analytical scenario, not a confirmed FCC rule. As of the August reporting, the FCC had not published final language, and there was no confirmed provision explicitly grandfathering existing 800G modules or specifically denying Chinese 1.6T products. The distinction is important. Because 1.6T is still in an earlier volume-ramp phase than 800G, a rule focused on newly submitted or newly approved models could have a disproportionate effect on the next generation of AI networking even if the policy never uses the terms “800G” or “1.6T.”

This is one reason the draft could have effects beyond immediate security screening. If restrictions focus on future product generations, they could gradually reduce Chinese participation in the U.S. optical-infrastructure market while allowing time for Coherent, Lumentum, Applied Optoelectronics, other module suppliers, and domestic photonics fabs to expand. The constraint is that policy timing alone cannot create replacement capacity; manufacturing yield, qualification, capital, and equipment availability set separate industrial timelines.

The structural lesson is therefore sharper than a simple “decoupling” story: downstream diversification does not automatically create upstream independence, and legal exclusion does not automatically create replacement capacity. A government can change the approved supplier list faster than the industry can grow high-quality compound-semiconductor wafers, expand laser fabs, qualify new photonic engines, and reproduce high-volume module yield. The bottleneck can migrate upstream or reappear downstream as a manufacturing-capacity gap.

This is a concrete optical example of the broader boundary-conditions framework developed in USA and China: Are We Entering a Two-Operating-System World?: once policy, technology access, and supply-chain concentration harden into operating constraints, a previously integrated technology stack can begin splitting into parallel routes with different costs and dependencies.

This is the point at which photonics begins to resemble advanced semiconductors. The strategically important object is not only the branded final component. It is the chain of materials, fabs, process knowledge, packaging, qualification, and capacity rights underneath it. As optical links become part of the computational fabric of AI, photonic components acquire some of the strategic significance previously associated with GPUs, HBM, advanced packaging, and semiconductor equipment.

A similar structural asymmetry appears at another layer of the map in Bound by Structure: Diverging AI and Robotics Paths in the United States and China. Optics and robotics are different supply chains, but both show why frontier capability alone does not determine strategic position: manufacturing density, component ecosystems, deployment capacity, and policy boundaries can become equally decisive once an AI technology moves from laboratory capability into industrial scale.

The Value Chain Is Being Reassembled, Not Destroyed

The shift from pluggable optics to LPO, CPO, and optical I/O is sometimes framed as a set of winners and losers: DSPs disappear, modules disappear, packaging wins, lasers win. That framing is too static. A technology transition usually does not erase an entire value chain. It changes which function is scarce and where that function is physically located.

Consider the module DSP. LPO can remove it from one class of short-reach pluggable link, but longer-reach optics, heterogeneous deployments, and many conventional transceivers can continue using DSPs. Meanwhile the host ASIC must become more capable if the module becomes more linear. Value does not vanish; some of it migrates into SerDes and system engineering.

Consider the optical module manufacturer. CPO can reduce demand for the conventional front-panel box in a particular switching tier, but the system still needs optical engines, connectors, fiber assemblies, lasers, test, and field-service components. A manufacturer that can move from module assembly into optical engines or precision photonic integration may remain relevant, while a company optimized only for a mature form factor may face more pressure. The direction depends on capability, not category label.

Consider advanced packaging. CPO gives packaging providers a larger role because photonics must be placed close to high-power logic with high-yield electrical and optical interfaces. But packaging cannot substitute for the laser material or the fiber plant. TSMC, outsourced semiconductor assembly and test providers, optical assembly specialists, and equipment vendors may each own different steps. The value chain becomes more interdependent, not less.

Most importantly, the 2026 capacity agreements show that industrial power can migrate upstream while manufacturing power remains distributed across borders. NVIDIA’s roughly $4 billion of combined announced investments in Lumentum and Coherent secure advanced photonics capacity. Lumentum’s approximately $87 million deposit arrangement secures InP substrate capacity from AXT. Counterpoint’s analysis of the proposed FCC restriction highlights the complementary downstream reality: Chinese suppliers still provide a very large share of finished transceiver volume, while those same suppliers depend on Western DSP and laser technology. The scarce object is therefore not merely one chip or one module. It is the ability to convert material and component technology into reliable optical bandwidth at AI scale.

This is the strongest reason not to interpret the photonic transition as a stock-market rotation or a single product cycle. It is a reorganization of the physical interface between compute and communication. As that interface moves, different firms capture value at different points, but the system as a whole becomes more dependent on photonics manufacturing, optical packaging, and materials science.

Counterfactual Compression: What Would Have to Be True for the Optical Boundary Not to Move?

If the optical boundary did not move inward over the next 5–15 years, future AI systems would need to sustain much higher bandwidth density across roughly today’s electrical reaches without a material increase in signal-conditioning power, channel loss, cable bulk, latency, board complexity, or thermal burden.

Then several conditions would need to hold simultaneously: SerDes and packaging improvements would need to offset rising per-lane channel loss; active copper and retimers would need to extend reach without unacceptable power or latency; front-panel architectures would need to absorb higher switch radix within practical power and thermal budgets; and those electrical extensions would need to remain economically preferable to relocating optical conversion closer to the ASIC.

But that combined world is in tension with observable constraints. Vendors are already deploying CPO systems, funding multiyear photonics capacity, reserving InP supply, and developing optical I/O in response to electrical reach, power-per-bit, and bandwidth-density pressures. This does not prove a uniform or immediate migration. It narrows the plausible range of long-term architectures if the underlying physical and industrial constraints remain broadly similar.

Epistemic humility. Alternative outcomes remain possible if constraints shift. This reflects current observable trajectories, not inevitability. Structural balance may change under new technological or policy regimes.

Conclusion: The Optical Boundary Is Moving Inward

The AI infrastructure story began with accelerators, but each generation has widened the set of constraints that determine whether those accelerators can be used efficiently. HBM became strategic because processors cannot compute on data they cannot access. Advanced packaging became strategic because memory and logic must be integrated at enormous bandwidth. Power became strategic because installed silicon is useless without deliverable electricity. Networking is entering the same category because a large AI system cannot behave like one machine if its processors cannot exchange data efficiently.

Optics is one physical answer to that constraint, but the important transition is not simply “more fiber.” It is the movement of the conversion boundary. Traditional pluggables place that boundary at the front panel. LPO keeps the boundary there but removes much of the module DSP. CPO pulls optical engines toward the switching ASIC. Optical I/O asks whether the processor package itself could export high-bandwidth data optically. Each step trades electrical reach for a different combination of integration, serviceability, thermal management, yield, and operational complexity.

The events of 2026 are best read as a sequence rather than as a list of isolated announcements. In March, NVIDIA moved to secure long-term photonics capacity. In April, AXT raised capital to expand the InP substrate base beneath that capacity. In July, Lumentum reserved AXT substrate supply through the next several years. In August, the FCC draft raised the prospect of reduced future reliance on Chinese modules, while the current AI buildout still depends heavily on Chinese scale execution and parts of the upstream InP and indium chain remain exposed to China as well. The sequence shows pressure moving from AI systems into optics, then into materials, manufacturing capacity, and finally the political geography of who can supply each layer.

This is why the network can become more optical without becoming uniformly optical. Copper and AEC can remain rational over short distances. Pluggable optics can remain essential where reach, modularity, and field replacement dominate. CPO can become compelling at the most bandwidth-dense switching tiers. Optical I/O may emerge first in specialized accelerator systems. The transition is not one replacement cycle; it is a migration whose pace differs by distance, architecture, and operational requirement.

That is also why the most durable sentence for this transition is not that CPO will replace pluggables, that copper is dead, or that one material will win:

As AI systems scale, computation is increasingly constrained by how efficiently data can move, increasing the incentive to move the electrical-to-optical boundary closer to computation itself.

The current direction is shaped by physics, but the timetable remains an engineering and industrial question. Better SerDes, packaging, and active copper can slow the migration; CPO yield or serviceability problems can preserve pluggables longer; reliable and economical optical I/O could pull the boundary inward faster. What matters structurally is that networking is no longer merely a peripheral subsystem. At the highest bandwidth densities, it is increasingly part of compute architecture itself.

For the AI Civilization Map, this is the missing connective tissue in Layer 3 — Fiber & Distributed Intelligence. Fiber is not merely the medium between data centers. Photonics is becoming one of the mechanisms that can help increasingly distributed compute remain coherent enough to function as a larger machine. The present trajectory moves the optical boundary inward as the effective machine extends beyond any one chip.

Sources

• NVIDIA Technical Blog — Scaling Power-Efficient AI Factories with NVIDIA Spectrum-X Ethernet Photonics
• Broadcom — Co-Packaged Optics (CPO): Power Efficiency and Bandwidth Density
• LPO MSA — Release of the Specification for Linear Pluggable Optical Modules
• Ayar Labs — TeraPHY Optical I/O Chiplet
• Astera Labs — Aries PCIe/CXL Smart DSP Retimers
• Credo — 800G ZeroFlap Active Electrical Cable for In-Rack AI Connectivity
• Marvell — PAM4 Optical DSPs for AI and Cloud Interconnects
• Lumentum — Ultra-High-Power InP Laser Sources for CPO and External Light Sources
• Coherent — CPO Technology Demonstrations at OFC 2026
• OIF — Co-Packaging and External Laser Source Implementation Agreements
• TSMC — COUPE Silicon Photonics Integration for AI and HPC
• Lumentum / NVIDIA — Strategic Partnership to Develop Advanced Optics Technology, March 2, 2026
• Coherent / NVIDIA — Strategic Partnership to Scale Next-Generation Data Center Architecture, March 2, 2026
• AXT — First Quarter 2026 Results and InP Capacity Expansion
• AXT — Long-Term InP Supplier Agreement with Lumentum
• AXT Form 10-Q — China Export Controls and InP Permit Risk, Quarter Ended June 30, 2026
• Counterpoint Research — Innolight, Coherent, Lumentum: Who Wins and Loses in the Proposed FCC Ban on Chinese Transceivers?
• Coherent — OFC 2026 Investor Presentation: 6-inch InP Capacity Expansion
• Coherent — CHIPS Letter of Intent to Expand 6-inch InP Manufacturing in Texas, June 16, 2026
• Lumentum — New U.S. InP Laser Manufacturing Facility in Greensboro, North Carolina, March 26, 2026
• U.S. Geological Survey — Mineral Commodity Summaries 2026: Indium
• Investing.com — U.S. Optical Stocks Rally Following Reuters Report on Proposed Chinese Transceiver Restrictions, August 4, 2026
• Reuters — Exclusive: Trump Administration Drafting Ban on Chinese Data Center Devices, August 4, 2026
• Reuters — China AI Hardware Stocks Slump After News U.S. Plans to Ban Imports of Chinese Components, August 5, 2026

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